Telephone subset arrangement

ABSTRACT

A telephone circuit subset arrangement in which the base/emitter junction of a switching transistor (TR1) coupling an internal battery (B1) to the dialler chip&#39;s power terminals (VDD, VSS) is shunted by hook-switch signal contacts (HS) when the subset is brought into the off-hook mode, thereby turning the switching transistor off and disconnecting the battery. The circuit is so arranged that upon the switching transistor turning off, three auxiliary switching transistors (TR3, TR4 and TR5) turn on and operate the subset&#39;s line switch to connect line current to the dialler chip&#39;s power terminals. A network of resistors (R1, R2 and R3) associated with the switching transistor (TR1) ensure that on the one hand sufficient current is available to turn on the auxiliary switching transistors, and on the other hand limit the current to a magnitude which dose not cause excessive battery discharge while the subset is off-hook.

TECHNICAL FIELD

This invention relates to telephone subsets and in particular to lowvoltage telephone subsets incorporating a dialler chip and an electronicline switch.

BACKGROUND ART

The electronic line switch fulfils a number of functions including thehook-switch function, that is, the line switch acts as a hook-switchwhen a hook-switch control signal is selectively applied to the lineswitch, a hook-switch control signal being generated when the userbrings the subset into the off-hook mode. This control signal may beprovided by a ten number repertory tone/pulse dialler chip or amicroprocessor.

In a subset provided with a dialler chip and a conventional mechanicalhook-switch, the dialler chip is provided with its operating power fromcurrent derived from the exchange battery and drawn over the exchangeline through the hook-switch. As soon as the subset is brought into theoff-hook mode the hook-switch contacts operate and adequate operatingvoltage is extended to the dialler chip which is then able to function.

In the case of a subset provided with an electronic line switch,however, when such a subset is initially connected to the exchange line,or reconnected after subsequently being un-plugged, the dialler chip iswithout power because its power source is cut off by the line switchwhich it controls. Consequently the dialler chip cannot function and theline switch cannot be signalled.

A known method by which the dialler chip of such a subset is providedwith power is described in the specification of PCT/AU88/00046(corresponding to commonly assigned U.S. application Ser. No.07/377,830, now abandoned). This specification disclosed an arrangementwherein a storage capacitor provides a current source for the diallerchip. The arrangement is such that initially, with the capacitordischarged, upon connection of the subset's line terminals to theexchange line. Current flows via a circuit to cause a first transistorto switch on thereby rendering the subset's electronic line switchconducting. The capacitor is charged via the operated line switch untilthe voltage level across the capacitor reaches the minimum operationvoltage of the dialler chip. A control circuit then switches off thefirst transistor and hence the line switch.

This known arrangement, however, is not satisfactory for providing powerto the dialler chip in a lower voltage phone, and particularly lowvoltage phones in parallel, because of the low voltage at the phone lineterminals.

Another known arrangement for providing power to the dialler chip is ableed circuit around the line switch to bleed sufficient current fromthe exchange line in the on-hook mode. With low voltage subsets,particularly parallel low voltage subsets, the bleed current required topower the dialler chips would exceed the allowable on-hook currentallowed by some telecommunication authorities.

A solution to the problem of providing power to the dialler chip in theon-hook mode is to provide the power with a dry cell. An undesirablefeature of this solution, however, is the necessity to replace the cellwhen its capacity falls due to discharge. If the discharge is kept to aminimum, the cell life will be greatly extended.

DISCLOSURE OF INVENTION

It is therefore an object of the present invention to provide a dry cellswitching arrangement for disconnecting a dry cell providing power tothe dialler chip of a subset when the subset is in the off-hook mode.

The inventive concept of the present invention is to provide a switchingarrangement to disconnect a dry cell providing power to the subset'sdialler chip during the "off-hook" mode, the arrangement using minimalpower.

According to the invention there is provided a telephone subset circuitarrangement comprising first and second line terminal means forrespectively connecting to conductors of an exchange line, atransmission circuit means connected between said line terminal means, aline switch means whose switching element is formed by a conductive pathof a first controllable semi-conductor switch means having a controlelement coupled to a first output of a control means associated with thetransmission circuit means, said switching element being serially in thesubset circuit's loop current circuit, said control means having powerterminal means for applying energizing power to enable said controlmeans, wherein energy from a battery means associated with said subsetis connected to said power terminal means via a conductive path of asecond controllable semiconductor switch means when the subset is in theon-hook mode, and wherein when the subset is in the off-hook mode,hook-switch means render said second controllable semiconductor switchmeans non-conducting thereby disconnecting said battery means from saidpower terminal means, and rendering a third controllable semiconductorswitch means conducting, said third controllable semiconductor meansapplying signal means to hook-switch signal input means of said controlmeans, said control means thereupon producing a line switch signal torender said line switch's semiconductor switching element conducting,said power terminal means being thereby coupled via the transmissioncircuit means to said first and second line terminal means.

BRIEF DESCRIPTION OF DRAWINGS

In order that the invention can be readily understood, an embodimentthereof will now be described in relation to the FIGURE of the drawing,which is a schematic circuit incorporating the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

Referring to the drawing there is shown a schematic circuit of part of alow voltage telephone subset. The circuit comprises a ten numberrepertory tone/pulse dialler chip 1 having a dial pulse output DP, apower terminal VDD, a common voltage rail terminal VSS and a hook switchinput HS; an electronic line switch 2 serially connected between the L1line terminal (not shown) and the transmission circuit (TX), and theline switch control transistor TR6; a lithium 3 V dry cell B1; a hookswitch signal contact HS; a storage capacitor C1 connected across VDDand VSS, the positive terminal of battery B1 is connected to the emitterelement of transistor TR1 whose base element is connected to the commonvoltage rail via three serially connected resistors R1, R2 and R3; thecollector element of a PNP transistor TR1 is connected to the baseelement of an NPN transistor TR2 whose emitter is connected to VDD ofdialler chip 1; the junction of resistor R2 and R3 is connected to thebase element of an NPN transistor TR3 whose collector is connected tothe base element of a PNP transistor TR4 via resistor R5; the collectorof PNP transistor TR4 is connected to the base element of an NPNtransistor TR5 via resistor R6; the collector of transistor TR5 isconnected to HS of dialler chip 1; signal contact HS is connected acrossthe positive terminal of battery B1 and the junction of resistors R1 andR2; VSS is coupled to the L2 terminal (not shown) of the subset.

In operation, in the on-hook mode, the hook switch signal contacts HSare open and transistor TR1 is turned on by current provided by batteryB1 through its emitter/base junction and resistors R1, R2, R3.Transistor TR2 is turned on by current from battery B1 via theemitter/collector junction of transistor TR2. The collector/emitterjunction of transistor TR2 connects the positive terminal of battery B1to the VDD terminal of dialler chip 1 to maintain the chip's memory. Inthis condition the dialler chip typically draws 1.0 UA. Storagecapacitor C1 is quickly charged by current drawn from battery B1 via thecollector/emitter junction of transistor TR2. The charge on C1 maintainsthe chip's memory during impulse dialling.

When the subset is placed in the off-hook mode, signal contacts HS closeand effectively shunt transistor TR1 and resistor R1. Transistor TR1 andTR2 turn off. The current through resistors R2 and R3 increases causingtransistor TR3 to now turn on, which in turn causes transistors TR4 andTR5 to turn on. When transistor TR5 turns on terminal HS of dialler chip1 is rendered LOW, this causes terminal DP to go HIGH. Terminal DP isconnected to the base element of line switch control transistor TR6which is turned on by the changed condition on terminal DP. TransistorTR6 renders line switch 2 conducting and dialler chip 1 is now poweredby current from the exchange line via the line switch and thetransmission circuit.

The values of resistors R2 and R3 must be such that on the one handsufficient current must be available to turn on transistor TR3, and onthe other hand limit the current to a magnitude which does not causeexcessive battery discharge. Typically, this current should beapproximately 1.0 UA.

While the present invention has been described with regard to manyparticulars it is understood that equivalents may be readily substitutedwithout departing from the scope of the invention.

I claim:
 1. A telephone subset circuit arrangement comprisingfirst andsecond line terminals for respectively connecting the subset to firstand second conductors of an exchange line, a transmission circuitconnected between said first and second line terminals, a loop currentcircuit, a battery, and a line switch circuit further comprisingcontrolmeans associated with the transmission circuit and having power terminalmeans for applying energizing power to enable said control means andhook-switch signal input means responsive to a control signal forthereupon producing a line switch signal, first controllablesemiconductor switch means responsive to said line switch signal andhaving a control element coupled to a first output of said control meansand a conductive path forming a switching element in series with saidloop current circuit, second controllable semiconductor switch meansfor, when the subset is in an on-hook mode, connecting energy from saidbattery to said power terminal means, third controllable semiconductorswitch means for applying said control signal to said hook-switch signalinput means, and hook-switch means for, when the subset is in theoff-hook mode, rendering said second controllable semiconductor switchmeans non-conducting to thereby disconnect said battery from said powerterminal means, and rendering said third controllable semiconductorswitch means conducting to thereby couple said power terminal via thetransmission circuit to said first and second line terminals.
 2. Anarrangement as claimed in claim 1, whereinsaid second controllablesemiconductor switch means further comprises a first transistor, asecond transistor arranged in a complementary configuration with saidfirst transistor, and a resistance in series with a junction of saidsecond transistor, anda conductive path of said first transistorconnects energy from said battery to said power terminal means uponbeing rendered conducting by said second transistor by current flowingfrom said battery means across said junction.
 3. An arrangement asclaimed in claim 2, wherein when the said subset is in the off-hookmode,said hook switch means short circuits said junction and apredetermined part of said resistance, said second semiconductorswitching means is rendered non-conducting and, said current increasesby a predetermined magnitude to render said third semiconductor switchmeans conducting.
 4. An arrangement as claimed in claim 3, whereinsaidresistance further comprisesa first resistor, a second resistor, and athird resistor, said first, second and third resistors are coupled inseries with said second resistor between said first and third resistors,the distal end of the first resistor is connected to a control elementof said second transistor and the distal end of said third resistor isconnected to a pole of said battery, a junction between the firstresistor and the second resistor is connected to a terminal of saidhook-switch means, and a junction between the second resistor and thethird resistor is coupled to a control element of the third controllablesemiconductor switch means.
 5. An arrangement as claimed in claim 1,wherein a capacitive storage means is connected across said powerterminal means.